Feex·CPU
AMD · EPYC · Server

AMD® EPYC™ 8125P

The AMD EPYC 8125P is a server processor released on May 19, 2026, built on the Zen 5 architecture using a 4 nm process. It has 16 cores and 32 threads, a base clock of 2.65 GHz, a maximum boost of 4.50 GHz, 128 MB of L3 cache, a 125 W TDP and the SP6 socket.

AMDEPYCServerSP6Zen 5TDP 125 W4 nm2026
Cores
16
Threads
32
Boost Clock
4.5 GHz
Base Clock
2.65 GHz
Architecture
Zen 5
Socket
SP6
Process Node
4 nm
TDP
125 W
Core layout
PPPPPPPPPPPPPPPP
16 Performance 32 Threads

Best for

Server / professional infrastructure

Overview

The AMD EPYC 8125P is a server processor with 16 cores and 32 threads, built on the Zen 5 architecture (4 nm process). It launched in May 2026. Clocks run from 2.65 GHz base to 4.5 GHz boost. A 128-MB L3 cache backs the cores (9.0 MB per core). It supports DDR5 memory. The chip drops into the SP6 socket and exposes PCIe 5.0 (96 lanes). Rated TDP is 125 W.

Core Configuration

Cores
16
Threads
32
Threads per Core
2
Base Clock
2.65 GHz
Boost Clock
4.5 GHz

The AMD EPYC 8125P has 16 physical cores and runs 32 logical threads. It runs 2 threads per core. It runs at a base clock of 2.65 GHz and boosts up to 4.50 GHz.

Architecture & Generation

Manufacturer
AMD
Family
EPYC
Segment
Server
Generation
EPYC 8005 Series
Architecture
Zen 5
Process Node
4 nm
Lithography
4 nm
Release Date
May 2026

The AMD EPYC 8125P is a server processor, belongs to the AMD EPYC family, uses the Zen 5 architecture and is manufactured on a 4 nm process. It launched in May 2026.

Cache

L2 Cache (Total)
16 MB
L2 Cache (per Core)
1 MB
L3 Cache
128 MB
Cache per Core
9 MB
Total Cache
144 MB

The AMD EPYC 8125P has 16 MB of L2 cache and 128 MB of L3 cache. That adds up to about 144.0 MB of cache, or 9.00 MB per core. Each core has 1 MB of private L2 cache. Feex has no recorded L1 cache size for this processor.

Cache Hierarchy

L2L3
L2 16 MBL3 128 MB

The AMD EPYC 8125P has a 2-level cache hierarchy: L2 at 16 MB and L3 at 128 MB. L3 is the largest level and makes up about 89% of the cache listed here.

Memory Support

Max Memory
Not recorded
Memory Channels
6
Memory Bandwidth
307.2 GB/s
Memory Types
DDR5
DDR5 Support
Yes
DDR4 Support
No
LPDDR Support
No
Max Memory Speed
6,400

The AMD EPYC 8125P supports DDR5 memory, uses 6 memory channels, runs memory at up to 6,400 MT/s and delivers up to 307.2 GB/s of memory bandwidth. It does not support DDR4 and LPDDR memory.

Graphics

Integrated Graphics
No

The AMD EPYC 8125P does not include integrated graphics, so a discrete graphics card is required for display output.

Platform & Compatibility

Socket
SP6
PCIe Generation
5.0
PCIe Lanes
96

The AMD EPYC 8125P uses the SP6 socket, supports PCI Express 5.0 and provides up to 96 PCIe lanes.

Power & Thermals

TDP
125 W

The AMD EPYC 8125P has a rated TDP of 125 W.

Platform Capabilities

Instruction sets, security, virtualization, AI acceleration and OS readiness. Features are listed as supported, explicitly not supported, or not recorded; a feature that is not recorded is not the same as unsupported.

Instruction Sets

0 supported
Not recorded
AES-NIAVX-512AVX2AVXAVX-VNNICET

Security and Reliability

0 supported
Not recorded
AMD SEVAMD SMEControl-flow Enforcement (CET)Execute Disable (NX)Memory EncryptionSMAP

Virtualization

0 supported
Not recorded
AMD SVMAMD-V (Hardware Virtualization)NPT / RVIIOMMUSecond-Level Address Translation

Feex has no record for AES-NI, AVX-512, AVX2, AVX, AVX-VNNI and CET, which is different from being unsupported.

Feex has no record for AMD SEV, AMD SME, Control-flow Enforcement (CET), Execute Disable (NX), Memory Encryption and SMAP, which is different from being unsupported.

Feex has no record for AMD SVM, AMD-V (Hardware Virtualization), NPT / RVI, IOMMU and Second-Level Address Translation, which is different from being unsupported.

Physical & Manufacturing

Foundry
TSMC
Launch Price
$799

The AMD EPYC 8125P is manufactured by TSMC. It launched at a price of $799.

Naming & Aliases

Display Name
AMD® EPYC™ 8125P
Product line brand
EPYC

Real-world compute in the Feex fleet

No Feex fleet machines with the AMD EPYC 8125P have reported compute telemetry yet, so real-world compute for this processor is not recorded.

How fleet compute is measured · Fleet compute leaderboard · JSON

Data Coverage

Feex has recorded 41% of the specifications it tracks for the AMD EPYC 8125P. Values Feex does not hold are shown as "Not recorded" rather than estimated.

Not recorded: Core Configuration: Performance Cores, Efficiency Cores, Hybrid Architecture, All-Core Boost and Unlocked Multiplier. Architecture & Generation: Codename, ISA Family and Market Status. Cache: L1 Cache (Total) and L4 Cache. Memory Support: ECC Memory. Platform & Compatibility: Package and Package Size. Power & Thermals: Base Power, Maximum Turbo Power, Configurable TDP (Min), Configurable TDP (Max), Max Junction Temperature and Tcase. Physical & Manufacturing: Transistor Count, Die Size and Die Count. Naming & Aliases: Normalized Name, SKU, Model Number, Processor Number and Part Number. Performance: single-core and multi-core ratings and all computed performance metrics.

Common questions

How many cores and threads does the AMD EPYC 8125P have?

The AMD EPYC 8125P has 16 cores and 32 threads.

What architecture does the AMD EPYC 8125P use?

The AMD EPYC 8125P is built on the Zen 5 architecture on a 4 nm process.

Does the AMD EPYC 8125P have integrated graphics?

No. The AMD EPYC 8125P does not include integrated graphics.

What socket does the AMD EPYC 8125P use?

The AMD EPYC 8125P uses the SP6 socket.

What memory does the AMD EPYC 8125P support?

The AMD EPYC 8125P supports DDR5 across 6 channels.

How fast does the AMD EPYC 8125P run?

The AMD EPYC 8125P can boost up to 4.5 GHz, with a 2.65 GHz base clock.

What is the TDP of the AMD EPYC 8125P?

The AMD EPYC 8125P has a TDP of 125 W.

What is the AMD EPYC 8125P best for?

Based on its specifications, the AMD EPYC 8125P is well suited for Server / professional infrastructure.

How much cache does the AMD EPYC 8125P have?

The AMD EPYC 8125P has 16384 KB of L2 cache and 128 MB of L3 cache.